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The 3DSP™ Software Studio tools are a collection of development tools designed to speed DSP software development. Starting from the graphical user interface (GUI), there are tools to edit, compile, assemble, optimize, debug and manage your application code. All tools have been optimized for use with the 3DSP family of processors.

One step compile and link, or create libraries of reusable code - your choice. You can even mix 'C' and assembly source files in one compile command. And all code is packed and optimized to take full advantage of the 3DSP processor architecture.

A powerful GUI-based debugger with a highly optimized SP-x instruction set simulator makes debugging easy and fast. Or optionally, substitute the FPGA-based hardware development board for the simulator and get an emulation speed debugger at reasonable cost, while retaining the same GUI-based debug environment.

Reduced software development time
Improved code quality
Increased software performance
Reduced development cost


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Data Brief Data Sheet Application Notes Request Manuals





Program editor

Program file manager

Make facility





ANSI 'C' compatible

Extensions for 3DSP architectures

Force variables to A or B memory

Fractional data types

Loop instruction


Associate variables with registers, accumulators, or AGU pointers

Packs and optimizes code


Optionally generated assembly code for hand optimization and debug

Includes SP-x specific header files

Define DSP data types

Define control register fields

Built-in Assembler


Allows mixing of C and assembly
code


Automatically invokes all tools from preprocessor to linker






Creates and manipulates libraries
of object modules

Start-up libraries included

Initializes memory and interrupts


Standard library includes debug
functions





Links object modules

Searches libraries


Relocates code to implemented memory addresses


Generates a memory map for
debug



Cycle accurate core simulation


Functional simulation of I/O with user set latency


Execution control includes run, single step and run n cycles

Set and monitor the DSP state

Set breakpoints on

Program or data memory address

Register access

Source code line number

Errors or exit

Conditional breaks with

Break on nth occurrence

Break only on write

Break only if value written is x

Profiling to improve performance

Histogram of memory usage

Formatting of data values





Easy to use graphical interface


Supports SP-x development kit for high speed emulation

Full access to debug commands





Plug-and-play with PC via USB port


Supported on PC with Windows 98 or 2000

Integrated with GUI Debugger

Download all hardware into the FPGA

Dedicated memory for user programs

4 MB Flash memory for program storage

2 MB Static RAM for data storage

Separate memory used by interface

142 user configurable I/O pins



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